TTL (Transistor-Transistor Logic)
The signal levels are typically Vlow ≤ 0.5 V and Vhigh ≥ 2.5 V. A positive and negative signal (e.g. A, A) are each sent from the sender to the receiver and evaluated differentially. This symmetrical signal transmission and differential evaluation can minimize common mode interference and achieve higher data rates.

[1] "1" area |
[2] "0" area |
